John Von Neumann’s Architecture

All computers share the same basic architecture, whether it is a mainframe or a Palm Pilot. All have memory, an I/O system, and arithmetic/logic unit, and a control unit. This type of architecture is named Von Neumann’s Architecture after the mathematician, John Von Neumann who conceived of the design. John Von Neumann begins his “Preliminary Discussion” with a broad description of the general-purpose computing machine containing four basic components. These are known as relating to arithmetic, memory, control, and connection with the human operator. In other words, the arithmetic/logical unit (ALU), the memory, the control unit (CU), and the input-output (I/O) devices that we see in the classical model of what a computer “looks like.

• Memory
  Computer Memory is the subsystem that serves as temporary storage for all program instructions and data that are being executed by the computer. It is typically called RAM (Random Access Memory). Memory is divided up into cells, each cell having a unique address so that the data can be fetched.
• Arithmetic/logical unit (ALU)
  This subsystem is to perform all arithmetic operations and comparisons for equality. In the Von Neumann’s architecture, the arithmetic/logical unit (ALU) and the Control Unit (CU) are separate components, but in modern systems they are integrated into the processor. The ALU has 3 sections, the register, the ALU circuitry, and the pathways in between. The register is basically a storage cell that works like RAM and holds the results of the calculations. It is mush faster than RAM and is addresses differently. The ALU circuitry is that actually performs the calculations, and it is designed from AND, OR, and NOT gates just as any chip.
• Control Unit (CU)
  The control unit is responsible for fetching the next program instruction to be run from memory, decode it to determine what needs to be done, and then issue the proper command to the ALU, memory and I/O controllers to get the job done. These steps are done continuously until the last line of a program is done, which is usually QUIT or STOP.
• Input-output (I/O) devices
  This is the subsystem that allows the computer to interact with other devices and communicate to the outside world. It also is responsible for program storage, such as hard drive control.

Programmed I/O, Interrupt & Direct Memory Access (DMA)

Programmed I/O

Programmed I/O (PIO) refers to data transfers initiated by a CPU under driver software control to access registers or memory on a device.

The CPU issues a command then waits for I/O operations to be complete. As the CPU is faster than the I/O module, the problem with programmed I/O is that the CPU has to wait a long time for the I/O module of concern to be ready for either reception or transmission of data. The CPU, while waiting, must repeatedly check the status of the I/O module, and this process is known as Polling. As a result, the level of the performance of the entire system is severely degraded.

Programmed I/O basically works in these ways:

• CPU requests I/O operation
• I/O module performs operation
• I/O module sets status bits
• CPU checks status bits periodically
• I/O module does not inform CPU directly
• I/O module does not interrupt CPU
• CPU may wait or come back later

Interrupt

The CPU issues commands to the I/O module then proceeds with its normal work until interrupted by I/O device on completion of its work.

For input, the device interrupts the CPU when new data has arrived and is ready to be retrieved by the system processor. The actual actions to perform depend on whether the device uses I/O ports, memory mapping.

For output, the device delivers an interrupt either when it is ready to accept new data or to acknowledge a successful data transfer. Memory-mapped and DMA-capable devices usually generate interrupts to tell the system they are done with the buffer.

Although Interrupt relieves the CPU of having to wait for the devices, but it is still inefficient in data transfer of large amount because the CPU has to transfer the data word by word between I/O module and memory.

Below are the basic operations of Interrupt:

• CPU issues read command
• I/O module gets data from peripheral whilst CPU does other work
• I/O module interrupts CPU
• CPU requests data
• I/O module transfers data

Direct Memory Access (DMA)

Direct Memory Access (DMA) means CPU grants I/O module authority to read from or write to memory without involvement. DMA module controls exchange of data between main memory and the I/O device. Because of DMA device can transfer data directly to and from memory, rather than using the CPU as an intermediary, and can thus relieve congestion on the bus. CPU is only involved at the beginning and end of the transfer and interrupted only after entire block has been transferred.

Direct Memory Access needs a special hardware called DMA controller (DMAC) that manages the data transfers and arbitrates access to the system bus. The controllers are programmed with source and destination pointers (where to read/write the data), counters to track the number of transferred bytes, and settings, which includes I/O and memory types, interrupts and states for the CPU cycles.

DMA increases system concurrency by allowing the CPU to perform tasks while the DMA system transfers data via the system and memory busses. Hardware design is complicated because the DMA controller must be integrated into the system, and the system must allow the DMA controller to be a bus master. Cycle stealing may also be necessary to allow the CPU and DMA controller to share use of the memory bus.